Hardware-Beschreibungssprache VHDL 2020/2021 /KursID:1856
- Letzter Beitrag vom 2021-02-08

Lehrende(r)

Dipl.-Ing. Jürgen Frickel

Einrichtung

Lehrstuhl für Informationstechnik mit dem Schwerpunkt Kommunikationselektronik (Stiftungslehrstuhl)

Aufzeichnungsart

Vorlesungsreihe

Zugang

Studon

Sprache

Deutsch

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1
Hw-Bs VHDL Lec-1 (1-16) preview image
Hw-Bs VHDL Lec-1 (1-16)
Dipl.-Ing. Jürgen Frickel
2020-11-02
Studon
01:40:41
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2
Hw-Bs VHDL Lec-2 (17-63) preview image
Hw-Bs VHDL Lec-2 (17-63)
Dipl.-Ing. Jürgen Frickel
2020-11-09
Studon
01:39:54
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3
Hw-Bs VHDL Lab-1 preview image
Hw-Bs VHDL Lab-1
Dipl.-Ing. Jürgen Frickel
2020-11-16
Studon
00:54:26
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4
Hw-Bs VHDL Lec-3 (64-95) preview image
Hw-Bs VHDL Lec-3 (64-95)
Dipl.-Ing. Jürgen Frickel
2020-11-23
Studon
01:35:28
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5
Hw-Bs VHDL Lab-2 preview image
Hw-Bs VHDL Lab-2
Dipl.-Ing. Jürgen Frickel
2020-11-30
Studon
00:44:49
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6
Hw-Bs VHDL Lec-4 (96-120) preview image
Hw-Bs VHDL Lec-4 (96-120)
Dipl.-Ing. Jürgen Frickel
2020-12-07
Studon
01:26:02
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7
Hw-Bs VHDL Lec-5 (121-147) preview image
Hw-Bs VHDL Lec-5 (121-147)
Dipl.-Ing. Jürgen Frickel
2020-12-22
Studon
01:32:22
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8
Hw-Bs VHDL Lab-3 (Task) preview image
Hw-Bs VHDL Lab-3 (Task)
Dipl.-Ing. Jürgen Frickel
2020-12-22
Studon
00:35:39
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9
Hw-Bs VHDL Lab-3 (Solution & Simulation) preview image
Hw-Bs VHDL Lab-3 (Solution & Simulation)
Dipl.-Ing. Jürgen Frickel
2020-12-22
Studon
00:17:42
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10
Hw-Bs VHDL Lec-6 (148-168) preview image
Hw-Bs VHDL Lec-6 (148-168)
Dipl.-Ing. Jürgen Frickel
2021-01-11
Studon
01:33:25
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11
Hw-Bs VHDL Lab-4 (Task) preview image
Hw-Bs VHDL Lab-4 (Task)
Dipl.-Ing. Jürgen Frickel
2021-01-18
Studon
00:34:22
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12
Hw-Bs VHDL Lab-4 (Solution) preview image
Hw-Bs VHDL Lab-4 (Solution)
Dipl.-Ing. Jürgen Frickel
2021-01-18
Studon
00:17:07
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13
Hw-Bs VHDL Lec-7 (170-196) preview image
Hw-Bs VHDL Lec-7 (170-196)
Dipl.-Ing. Jürgen Frickel
2021-01-25
Studon
01:31:22
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14
Hw-Bs VHDL Lec-8 (198-241) preview image
Hw-Bs VHDL Lec-8 (198-241)
Dipl.-Ing. Jürgen Frickel
2021-01-31
Studon
01:32:48
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15
Hw-Bs VHDL Lec-9 (241-Ende) preview image
Hw-Bs VHDL Lec-9 (241-Ende)
Dipl.-Ing. Jürgen Frickel
2021-02-08
Studon
01:24:37
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